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Actel公司的SmartFusion是集成了FPGA, ARM Cortex-M3和可编程模拟的智能混淆信号FPGA,非常适合硬件和嵌入系统设计.本京电港论坛文章先容了SmartFusion混淆信号FPGA主要特点,方框架图, 以及SmartFusion评估板主要特点,部门电路原理图纸和马达控制与工业自动化的开辟方框架图. Actel’s SmartFusion Intelligent Mixed-Signal FPGAs are the only devices that integrate an FPGA, ARM® Cortex™-M3, and programmable analog, offering full customization, IP protection, and ease-of-use. Based on Actels proprietary flash process, SmartFusion FPGAs are ideal for hardware and embedded designers who need a true system-on-chip (SoC) solution that gives more flexibility than traditional fixed-function microcontrollers―without the excessive cost of soft processor cores on traditional FPGAs. SmartFusion主要特点: Microcontroller Subsystem (MSS) • Hard 100 MHz 32-Bit ARM® Cortex™-M3 C 1.25 DMIPS/MHz Throughput from Zero Wait State Memory Memory Protection Unit (MPU) C Single Cycle Multiplication, Hardware Divide C JTAG Debug (4 wires), Serial Wire Debug (SWD, 2 wires), and Single Wire Viewer (SWV) Interfaces • Internal Memory C Embedded Nonvolatile Flash Memory (eNVM), 64 Kbytes to 512 Kbytes C Embedded High-Speed SRAM (eSRAM), 16 Kbytes to 64 Kbytes, Implemented in 2 Physical Blocks to enable Simultaneous Access from 2 Different Masters • Multi-Layer AHB Communications Matrix Provides up to 16 Gbps of On-Chip Memory Bandwidth,1 Allowing Multi-Master Schemes • 10/100 Ethernet MAC with RMII Interface2 • Programmable External Memory Controller,2 Which Supports: C NOR Flash, SRAM, PSRAM C Synchronous SRAMs • Two I2C Peripherals • Two 16550 Compatible UARTs • Two SPI Peripherals • Two 32-Bit Timers • 32-Bit Watchdog Timer • 8-Channel DMA Controller to Offload the Cortex-M3 from Data Transactions • Clock Sources C 1.5 MHz to 20 MHz Main Oscillator C Battery-Backed 32 KHz Low-Power Oscillator with Real-Time Counter (RTC) C 100 MHz Embedded RC Oscillator; 1% Accurate C Embedded Analog PLL with 4 Output Phases (0, 90, 180, 270) High-Performance FPGA • Based on Actels proven ProASIC®3 FPGA Fabric • Low-Power, Firm-Error Immune 130-nm, 7-Layer Metal, Flash-Based CMOS Process • Nonvolatile, Live at Power-Up, Retains Program When Powered Off • 350 MHz System Performance • Embedded SRAMs and FIFOs Variable Aspect Ratio 4,608-Bit SRAM Blocks C x1, x2, x4, x9, and x18 Organizations C True Dual-Port SRAM (excluding x18) C Programmable Embedded FIFO Control Logic • Secure ISP with 128-Bit AES via JTAG • FlashLock® to Secure FPGA Contents • Five Clock Conditioning Circuits (CCCs) with up to 2 Integrated Analog PLLs C Phase Shift, Multiply/Divide, and Delay Capabilities C Frequency: Input 1.5C350 MHz, Output 0.75 to 350 MHz Programmable Analog Analog Front-End (AFE) • Up to Three 12-Bit SAR ADCs C 500 Ksps in 12-Bit Mode C 550 Ksps in 10-Bit Mode C 600 Ksps in 8-Bit Mode • Internal 2.56 V Reference or Optional External Reference • One First-Order ΣΔ DAC (sigma-delta) per ADC C 12-Bit 500 Ksps Update Rate • Up to 5 High-Performance Analog Signal Conditioning Blocks (SCB) per Device, Each Including: C Two High-Voltage Bipolar Voltage Monitors (with 4 input ranges from ±2.5 V toC11.5/+14 V) with 1% Accuracy C High Gain Current Monitor, Differential Gain = 50, up to 14 V Common Mode C Temperature Monitor (Resolution = ¼°C in 12-Bit Mode; Accurate from C55℃ to 150℃) • Up to Ten High-Speed Voltage Comparators (tpd = 50 ns) Analog Compute Engine (ACE) • Offloads Cortex-M3CBased MSS from Analog Initialization and Processing of ADC, DAC, and SCBs • Sample Sequence Engine for ADC and DAC Parameter Set-Up • Post-Processing Engine for Functions such as Low-Pass Filtering and Linear Transformation • Easily Configured via GUI in Libero® Integrated Design (IDE) Software I/Os and Operating Voltage • FPGA I/Os LVDS, PCI, PCI-X, up to 24 mA IOH/IOL Up to 350 MHz • MSS I/Os C Schmitt Trigger, up to 6 mA IOH, 8 mA IOL C Up to 180 MHz • Digital VCC = 1.5 V (FPGA and MSS), Analog VCC = 3.3 V and 1.5 V SmartFusion intelligent mixed signal FPGAs are uniquely suited for active motor control for permanent magnet motors, servo motors, series motors, separately excited motors, and alternating current (AC) induction motors.
SmartFusion评估板 The SmartFusion Evaluation Kit offers a simple, low-cost way to try the worlds only FPGA with hard ARM Cortex-M3 and programmable analog. The SmartFusion device contains on-chip flash and on-chip SRAM memory, and the kit adds additional SPI flash memory, an OLED display, and built in Ethernet connectivity. The evaluation kit board also includes LEDs, switches, and various voltage, current and temperature monitoring functions for analog experimentation on the board.
图2{京电港论坛}.SmartFusion评估板外形实物图 The SmartFusion Evaluation Kit board includes: A2F200M3F-FGG484ES 200,000 System FPGA gates, 256 KB flash memory, 64 KB SRAM, and additional distributed SRAM in the FPGA fabric and external memory controller Peripherals include Ethernet, DMAs, I2Cs, UARTs, timers, ADCs, DACs and additional analog resources Refer to the SmartFusion product page for full device information SPI-flash memory connected to SPI_0 on the device USB connection for programming and debug from Actels design tools USB to UART connection to UART_0 for HyperTerminal examples 10/100 Ethernet interface with on-chip MAC and external PHY RVI header for application programming and debug from either Keil or IAR Systems Mixed-signal header for daughter card support User Inputs and Outputs OLED display with I2C interface connected to I2C_0 on the device First-order ΣΔ DAC (sigma delta) output with 12-bit 500 Ksps update rate Potentiometer used to vary voltage input for voltage and current monitoring 8 LEDs connected to the FPGA fabric for FPGA demonstration 2 user input switches connected through FPGA fabric Both LEDs and switches can be used with GPIO by connecting through the fabric Selector to choose between GNU SoftConsole or RVI-Header for debug Selector to switch between programming the device (fabric) and debug mode On-board 20 MHz crystal for system clock On-board 32.768 KHz for RTC 5 user I/Os for debug Option to use internal 1.5 V regulator Designing with SmartFusion involves three different types of design: FPGA design, embedded design and analog design. These roles can be filled by three different designers, two designers, or even a single designer, depending on company structure and project complexity. Actel has developed design tools and flows to meet the needs of these three types of designers so they can work together smoothly on a single project. • FPGA Design―Libero® Integrated Design Environment (IDE) is Actel’s comprehensive software toolset for designing with all Actel FPGAs. Libero IDE includes industry-leading synthesis, simulation and debug tools from Synopsys® and Mentor Graphics®, as well as innovative timing and power optimization and analysis. • Embedded Design―Actel offers FREE SoftConsole Eclipse-based IDE, which includes the GNU C/C++ compiler and GDB debugger. Actel also offers evaluation versions of • Analog Design―The MSS configurator provides graphical configuration for current, voltage and temperature monitors, sample sequencing setup, and post-processing configuration, as well as DAC output. The MSS configurator creates a bridge between the FPGA and embedded designers so device configuration can be easily shared between multiple developers. SmartFusion intelligent mixed-signal FPGAs are uniquely suited to active motor control for permanent magnet motors, servo motors, series motors, separately excited motors and alternating current induction motors. A SmartFusion FPGA can actively manage multiple electric motors, including start and stop, control of rotational direction, speed and torque, protection against motor overloads or faults and active control using closed loop performance algorithms. SmartFusion on-chip resources allow you to monitor motor performance in real time with or without dedicated encoders, applying corrective control signals to maintain commanded direction, speed and torque and deliver precise motor position control. Actel’s motor control partner, Power and Control Design, Inc., has produced a SmartFusion Motor Control Development Kit that enables demonstration and benchtop development of your world-class permanent magnet motor control products. The kit includes five reference designs with source files: • Trapezoidal using Hall effect sensor feedback • Sinusoidal using Hall effect sensor feedback • Sinusoidal with encoder feedback • Sensorless trapezoidal with back-EMF feedback • Ethernet interactive control of motors The range of peripherals SmartFusion offers for the Cortex-M3 processor and the flexibility of its FPGA fabric make the device ideal for industrial automation. The SmartFusion Development Kit supports Ethernet, EtherCAT, CAN, UART, I2C and SPI hardware, while firmware can be used for various other interface standards such as Modbus® and PROFIBUS for industrial networking. With the use of the programmable analog for sensing and analog outputs, SmartFusion can also be used in industrial control applications, including gateways, sensing, actuators and I/O devices. The list below describes how the various sections of the device could be used in industrial automation. Microcontroller Subsystem • ARM Cortex-M3 running Fieldbus protocol stack • Ethernet MAC C standard protocols FPGA Fabric • Multiple RS485 capable UARTs - PROFIBUS, Modbus, WorldFIP, P-NET • High Speed Manchester Encoding/Decoding • CAN Analog • ADC for sensing • DAC for excitation
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